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| No.13706545

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Information Name: | Supply 74HC595, AIP74HC595, NXP74HC595, SN74HC595, COMS shift register |
Published: | 2015-07-04 |
Validity: | 30 |
Specifications: | |
Quantity: | 12574.00 |
Price Description: | |
Detailed Product Description: | Supply AIP74HC595, NXP74HC595, SN74HC595,74HC595, COMS shift register LED display driver IC NXP74HC595 picture, LED display driver IC NXP74 ... Description: 74HC595 is a low noise, low power consumption, high-speed COMS shift register , capable of driving 15 LS-TTL loads. The device contains an 8-bit serial-in, parallel-out shift register and with three-state output control 8 D-type memory. Shift register and memory provided by a separate clock signals. Built directly shift register is cleared, the serial input and a serial output for cascading. Clock rising edge triggered shift registers and memory. If provided with a clock signal, the shift register state must give a pulse signal than memory. AIP74HC products compatible with 74LS series, all input devices between power and ground pins have diode protection structure to prevent circuit damage from static electricity. Product description: Properties and Uses. ? Features 8-bit serial input 8-bit serial or parallel output storage register output and 3-STate direct definite shift register 100 MHz (typical value) frequency shift ESD protection:????? HBM EIA / JESD22- A114-A 超过 2000 V MM EIA / JESD22-A115-A 超过 200 V. Application Serial-to-parallel data converter remote controlled Register Description 74HC595;??. 74HCT595 The 74HC / HCT595 are high-speed Si-gate CMOS device and is pin compatible low-power Schottky TTL (input channels). They are specified in compliance with JEDEC Standard. 7A. The 74HC / HCT595 is an 8-stage serial shift register storage register and 3-state output. The shift register and storage register have separate clocks. Data is transferred forward converter SH_CP input data for each register to ST_CP enter a country in a positive interim storage registers. If the two clocks together, shift registers will always be a clock pulse ahead of the storage register this shift register has a serial input and serial (DS) cascade standard output (Q7 ') low quiescent current: Maximum 80UA Low Input Current: 1UA with memory function 8 string line input, parallel output shift register Wide operating voltage range: 2V-6V cascadable shift registers can be directly cleared shift clock frequency: DC-30MHz Package: DIP16 / SOP16 Applications: 74HC595 is a low noise, Low-power, high-speed COMS shift register can drive 15 LS-TTL loads. The device contains an 8-bit serial-in, parallel-out shift register and with three-state output control 8 D-type memory. Shift register and memory provided by a separate clock signals. Built directly shift register is cleared, the serial input and a serial output for cascading. Clock rising edge triggered shift registers and memory. If provided with a clock signal, the shift register state must give a pulse signal than memory. AIP74HC products compatible with 74LS series, all input devices between power and ground pins have diode protection structure to prevent circuit damage from static electricity. |
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Copyright © GuangDong ICP No. 10089450, Ray Electronics Co., Ltd., Dongguan City All rights reserved.
Technical support: ShenZhen AllWays Technology Development Co., Ltd.
AllSources Network's Disclaimer: The legitimacy of the enterprise information does not undertake any guarantee responsibility
You are the 13287 visitor
Copyright © GuangDong ICP No. 10089450, Ray Electronics Co., Ltd., Dongguan City All rights reserved.
Technical support: ShenZhen AllWays Technology Development Co., Ltd.
AllSources Network's Disclaimer: The legitimacy of the enterprise information does not undertake any guarantee responsibility